POD Tutorial - Revision history

JulienB: /* Drivers */

2013-08-26T15:11:25Z

‎Drivers

FabienM: /* Simulation */

2013-03-14T17:26:01Z

‎Simulation

FabienM at 17:15, 14 March 2013

2013-03-14T17:15:10Z

FabienM: /* Synthesis */

2012-05-21T09:48:18Z

‎Synthesis

FabienM: /* Synthesis */

2012-01-09T10:07:17Z

‎Synthesis

FabienM: /* Test */

2011-08-05T15:08:37Z

‎Test

FabienM at 09:54, 2 August 2011

2011-08-02T09:54:10Z

FabienM: /* Test */

2011-08-01T12:18:50Z

‎Test

FabienM: /* Test */

2011-08-01T08:44:42Z

‎Test

FabienM: /* Test */

2011-08-01T08:44:23Z

‎Test

@@ Line 509: / Line 509: @@
 </pre>
-To compile the drivers, go to your ''armadeus/'' directory then type ''make linux26-menuconfig''.
+To compile the drivers, go to your ''armadeus/'' directory, then:
 <pre class="config">
 Device Drivers  --->
-    Armadeus specific drivers  --->
+        ...
-         [*] Support for specific Armadeus drivers
+         [*] Support for specific Armadeus drivers --->
-        FPGA Drivers   --->
+            ...
-            <M>   Drivers generated by POD
+              *** FPGA related ***
 </pre>
 <pre style="host">
 $ make
 </pre>

@@ Line 433: / Line 433: @@
 POD.project:i2cledbutton_tutorial> simulation
 POD.project:i2cledbutton_tutorial.simulation>
 </pre>

@@ Line 1: / Line 1: @@
 == Introduction ==
-In this first tutorial, we will learn how to use POD with a simple example project for an [[APF9328]] board.
+In this first tutorial, we will learn how to use POD with a simple example project for an [[APF27]] board.
 The project is described in figure 1. It is composed of 3 virtual components:
 *  '''blink''' : blink is the instance name of a led (virtual component) that can «blink» by simply writing a value in a register.

@@ Line 424: / Line 424: @@
 The resulting bitstream (binary FPGA synthetized code) ''top_i2cledbutton.bit'' can be found in the ''i2cledbutton_tutorial/objs'' directory.
-{{Warning | There is a bug with ISE13.x, when tcl script is launched, the constraints file (ucf) is not read and ISE choose FPGA pinout randomly. To avoid this problem, once the script is sourced, re-launch the entire process by clicking right on «Generate Programming File» en selecting «re-run all» }}
+{{Warning | There is a bug with ISE-13.x and upper, when tcl script is launched, the constraints file (ucf) is not read and ISE choose FPGA pinout randomly. To avoid this problem, once the script is sourced, re-launch the entire process by clicking right on «Generate Programming File» en selecting «re-run all» }}
 == Simulation ==

@@ Line 419: / Line 419: @@
 In the Tcl tab ('''1'''), change the default directory to the synthesis directory ('''2'''), find the tcl script you want to execute ('''3''', under Windows type ''dir'' instead of ''ls'') and start it with the ''source'' command ('''4''').
 The resulting bitstream (binary FPGA synthetized code) ''top_i2cledbutton.bit'' can be found in the ''i2cledbutton_tutorial/objs'' directory.
 == Simulation ==

@@ Line 519: / Line 519: @@
 Once [[Target_Software_Installation#FPGA_firmware_installation | bitstream is loaded]], run linux and modprobe pod linux module :
 <pre class="apf">
-# modprobe pod_irq_ocore
+# modprobe irq_ocore
-# modprobe pod_board_irq_mng
+# modprobe pod_irq_mng
-IRQ 256
+# modprobe led_ocore
-IRQ 257
+# modprobe pod_leds
-IRQ 258
-IRQ 259
-IRQ 260
-IRQ 261
-IRQ 262
-IRQ 263
-IRQ 264
-IRQ 265
-IRQ 266
-IRQ 267
-IRQ 268
-IRQ 269
-IRQ 270
-IRQ 271
-# modprobe g_led
-# modprobe board_leds
 BLINK: MAJOR: 249 MINOR: 0
 LED module BLINK inserted
 # modprobe i2c-ocores-pod
-# modprobe board_i2c
+# modprobe pod_board_i2c
 PM: Adding info for platform:ocores-i2c-pod.0
 PM: Adding info for No Bus:i2c-2
 PM: Adding info for No Bus:i2c-2
-# modprobe gbutton
+# modprobe button_ocore
-# modprobe board_buttons
+# modprobe pod_buttons
 probing button
 button button.0: PUSH: MAJOR: 248 MINOR: 0

@@ Line 42: / Line 42: @@
 Documented commands (type help <topic>):
 ========================================
-EOF               create            history         ls              shell
+EOF               create            history          ls              shell
-addbusclock       delbusconnection  info            printxml        simulation
+addbusclock       delbusconnection  info             printxml        simulation
-addinstance       delinstance       intercon        quit            source
+addinstance       delinstance       generateintercon quit            source
-autoconnectbus    delpinconnection  listcomponents  report          synthesis
+autoconnectbus    delpinconnection  listcomponents   report          synthesis
-check             description       listforce       savehistory     top
+check             description       listforce        savehistory     generatetop
-closeproject      driver            listinstances   saveproject     version
+closeproject      driver            listinstances    saveproject     version
-connectbus        eof               listinterfaces  selectplatform
+connectbus        eof               listinterfaces   selectplatform
-connectinterface  exit              listmasters     setaddr
+connectinterface  exit              listmasters      setaddr
-connectpin        getmapping        listplatforms   setforce
+connectpin        getmapping        listplatforms    setforce
-connectport       help              load            setgeneric
+connectport       help              load             setgeneric
 </pre>
@@ Line 340: / Line 340: @@
 * for wrapper master wishbone bus
 <pre style="host">
-POD> intercon imx27_wb16_wrapper00.mwb16
+POD> generateintercon imx27_wb16_wrapper00.mwb16
 Intercon with name : imx27_wb16_wrapper00_mwb16_intercon Done
 Component imx27_wb16_wrapper00_mwb16 added as imx27_wb16_wrapper00_mwb16_intercon
@@ Line 347: / Line 347: @@
 * for syscon master candr bus
 <pre style="host">
-POD> intercon rstgen_syscon00.candroutput
+POD> generateintercon rstgen_syscon00.candroutput
 Intercon with name : rstgen_syscon00_candroutput_intercon Done
 Component rstgen_syscon00_candroutput added as rstgen_syscon00_candroutput_intercon
@@ Line 358: / Line 358: @@
 [[image:exemple-top.png|center|frame|400px|'''figure 9''' - ''Top'']]
-The Top component is the component responsible for connecting all instances in the FPGA. The Top can be generated with the ''top'' command
+The Top component is the component responsible for connecting all instances in the FPGA. The Top can be generated with the ''generatetop'' command
 <pre style="host">
-POD:i2cledbutton> top
+POD:i2cledbutton> generatetop
 Mapping for interface mwb16:

@@ Line 551: / Line 551: @@
 </pre>
-Read [A_simple_design_with_Wishbone_bus] to know how to use led and button.
+Read [[A_simple_design_with_Wishbone_bus]] to know how to use led and button.
 [[Category:POD]]

← Older revision		Revision as of 08:44, 1 August 2011
Line 550:		Line 550:

	</pre>		</pre>
		+
		+	Read [A_simple_design_with_Wishbone_bus] to know how to use led and button.
		+

	[[Category:POD]]		[[Category:POD]]