Difference between revisions of "SP VISION"

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The SP_Vision board is an extension of [[APF27Dev]] and [[APF51Dev]] with a Spartan6 and two DDR. It is designed for real-time video processing.
 
The SP_Vision board is an extension of [[APF27Dev]] and [[APF51Dev]] with a Spartan6 and two DDR. It is designed for real-time video processing.
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= Configure the sp_vision fpga =
  
 
SP_Vision FPGA configuration is done through APF* FPGA, then to configure the SP_Vision FPGA you will need a configuration virtual component called ''sp_vision_configure'' under the APF*'s onboard FPGA.
 
SP_Vision FPGA configuration is done through APF* FPGA, then to configure the SP_Vision FPGA you will need a configuration virtual component called ''sp_vision_configure'' under the APF*'s onboard FPGA.
 
This virtual component is available in [http://periphondemand.git.sourceforge.net/git/gitweb.cgi?p=periphondemand/periphondemand;a=tree;f=src/library/components/sp_vision_configure;h=babdb0b05178267c1a8d077b0a1c5737820dea0e;hb=HEAD POD library], but if you don't want to make special design just for configuration, a standard design is provided in armadeus tree.
 
This virtual component is available in [http://periphondemand.git.sourceforge.net/git/gitweb.cgi?p=periphondemand/periphondemand;a=tree;f=src/library/components/sp_vision_configure;h=babdb0b05178267c1a8d077b0a1c5737820dea0e;hb=HEAD POD library], but if you don't want to make special design just for configuration, a standard design is provided in armadeus tree.
 
= Configure the sp_vision fpga =
 
 
 
  
 
== On the APF27_Dev ==
 
== On the APF27_Dev ==

Revision as of 17:40, 3 January 2012

Introduction

The SP_Vision board is an extension of APF27Dev and APF51Dev with a Spartan6 and two DDR. It is designed for real-time video processing.

Configure the sp_vision fpga

SP_Vision FPGA configuration is done through APF* FPGA, then to configure the SP_Vision FPGA you will need a configuration virtual component called sp_vision_configure under the APF*'s onboard FPGA. This virtual component is available in POD library, but if you don't want to make special design just for configuration, a standard design is provided in armadeus tree.

On the APF27_Dev

  • First select the driver for sp_vision_configuraton under linux-menuconfig :
[ ]$ make linux26-menuconfig
Device Drivers  --->       
    Armadeus specific drivers  --->
        FPGA Drivers   --->
            [...]
            [*]   virtual components
            [...]
            [*]   Board designs
            [...]
            <M>     board driver for sp_vision fpga loader

then

[ ]$ make linux26
[...]
[ ]$ make
[...]

For APF27 the configuration bitstream can be found under the directory firmware/pod_scripts/ and it's named apf27_spvision_loader.bit. To configure the second (sp_vision) FPGA, first (APF27) FPGA must be configured with this bitstream.

  • Once the first FPGA configured, just do :
 # modprobe sploader
 # modprobe sploader_prober
 # dd if=/usr/local/your_sp_vision_bitstream.bit of=/dev/sp_loader

On the APF51_Dev

Page under construction... Construction.png Informations on this page are not guaranteed !!

Communicate with sp_vision