Difference between revisions of "IMX27-Spartan3A interface description"
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[[image:Imx27-spartan3A.jpg|700px|center|thumb|'''figure 1''' - ''i.MX27-Spartan3A bus description'']] | [[image:Imx27-spartan3A.jpg|700px|center|thumb|'''figure 1''' - ''i.MX27-Spartan3A bus description'']] | ||
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+ | All signals plugged between I.MX27 and spartan3A are described on figure 1. Some others signals are used only for fpga configuration. For more informations about the FPGA wiring, see the [[Datasheet#APF27 | APF27 schematics]] and the [http://cache.freescale.com/files/32bit/doc/ref_manual/MCIMX27RM.pdf?fsrch=1&WT_TYPE=Reference%20Manuals&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&sr=2 i.MX27 reference manual], especially the WEIM chapter. |
Revision as of 16:04, 12 January 2012
This article describe the bus interface configuration to communicate between i.MX27 processor and Spartan3A FPGA.
All signals plugged between I.MX27 and spartan3A are described on figure 1. Some others signals are used only for fpga configuration. For more informations about the FPGA wiring, see the APF27 schematics and the i.MX27 reference manual, especially the WEIM chapter.