Difference between revisions of "SP VISION"

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(New page: == Introduction == The board sp_vision is an extension of apf27-Dev and apf51-dev with a spartan6 and two ddr. It is design for video processing. == Configure the Spartan6 with apf27-Dev...)
 
m (→‎On the APF*_Dev)
 
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== Introduction ==
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= Introduction =
  
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The board sp_vision is an extension of apf27-Dev and apf51-dev with a spartan6 and two ddr. It is design for video processing.
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The SP_Vision board is an extension of [[APF27Dev]] and [[APF51Dev]] with a Spartan6 and two DDR. It is designed for real-time video processing.
  
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== Configure the Spartan6 with apf27-Dev==
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= Configure the sp_vision fpga =
  
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Spartan6 selectmap configuration port is plugged on generic IO of apf27 spartan3 fpga. Then, to configure spartan6, a specific virtual component is required under spartan3.
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SP_Vision FPGA configuration is done through APF* FPGA, then to configure the SP_Vision FPGA you will need a configuration virtual component called ''sp_vision_configure'' under the APF*'s onboard FPGA.
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This virtual component is available under POD components library and is named ''spartan_selectmap''. This component must be added to your spartan3 design to enable sp_vision spartan6 configuration.
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This virtual component is available in [http://periphondemand.git.sourceforge.net/git/gitweb.cgi?p=periphondemand/periphondemand;a=tree;f=src/library/components/sp_vision_configure;h=babdb0b05178267c1a8d077b0a1c5737820dea0e;hb=HEAD POD library], but if you don't want to make special design just for configuration, a standard design is provided in armadeus tree.
  
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A simple spartan3 design is available under ARMadeus project tree ''firmware/sp_vision_config/'' to simplify sp_vision config. The design can be synthetized with ISE using the TCL script ''firmware/sp_vision_config/synthesis/testconfig.tcl''.
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== On the APF*_Dev ==
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The already synthetized bitstream is also available under ''firmware/sp_vision_config/bitstream/''.
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Then to configure spartan6 :
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* First select the driver for sp_vision_configuraton under linux-menuconfig :
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* first configure apf27-spartan3:
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 +
<pre class="host">
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[ ]$ make linux-menuconfig
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</pre>
 +
 
 +
<pre class="config">
 +
Device Drivers  --->     
 +
    Armadeus specific drivers  --->
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        FPGA Drivers  --->
 +
            [...]
 +
            [*]  virtual components
 +
            [...]
 +
            [*]  Board designs
 +
            [...]
 +
            <M>    board driver for sp_vision fpga loader
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</pre>
 +
 
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then
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<pre class="host">
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[ ]$ make linux
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[...]
 +
[ ]$ make
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[...]
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</pre>
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 +
The configuration bitstream can be found under the directory ''firmware/pod_scripts/'' and it's named '''apf27_spvision_loader.bit''' for APF27 and '''apf51_spvision_loader.bin''' for APF51. To configure the second (sp_vision) FPGA, first FPGA on APF* must be configured with this bitstream.
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* Configure the first fpga (if you transfer files by nfs):
 
<pre class="apf">
 
<pre class="apf">
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BIOS> tftpboot ${loadaddr} top_testconfig.bit
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# modprobe fpgaloader
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BIOS> fpga load 0 ${loadaddr} 2486f
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</pre>
 
</pre>
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* then configure the second fpga using ''loadsecond'' operator:
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On APF27:
 
<pre class="apf">
 
<pre class="apf">
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BIOS> tftpboot ${loadaddr} spartan6_example_top.bit
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# load_fpga apf27_spvision_loader.bit
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BIOS> fpga loadsecond 1 ${loadaddr} 16a674 D6000000 1
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</pre>
 
</pre>
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On APF51:
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<pre class="apf">
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# load_fpga apf51_spvision_loader.bin
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</pre>
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* Once the first FPGA configured, just do :
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<pre class="apf">
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# modprobe sploader
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# modprobe sploader_prober
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# dd if=your_sp_vision_bitstream.bit of=/dev/sp_loader
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</pre>
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= Communicate with sp_vision =
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{{Under_Construction}}

Latest revision as of 17:18, 4 September 2013

Introduction

The SP_Vision board is an extension of APF27Dev and APF51Dev with a Spartan6 and two DDR. It is designed for real-time video processing.

Configure the sp_vision fpga

SP_Vision FPGA configuration is done through APF* FPGA, then to configure the SP_Vision FPGA you will need a configuration virtual component called sp_vision_configure under the APF*'s onboard FPGA. This virtual component is available in POD library, but if you don't want to make special design just for configuration, a standard design is provided in armadeus tree.

On the APF*_Dev

  • First select the driver for sp_vision_configuraton under linux-menuconfig :
[ ]$ make linux-menuconfig

Device Drivers  --->       
    Armadeus specific drivers  --->
        FPGA Drivers   --->
            [...]
            [*]   virtual components
            [...]
            [*]   Board designs
            [...]
            <M>     board driver for sp_vision fpga loader

then 

[ ]$ make linux
[...]
[ ]$ make
[...]

The configuration bitstream can be found under the directory firmware/pod_scripts/ and it's named apf27_spvision_loader.bit for APF27 and apf51_spvision_loader.bin for APF51. To configure the second (sp_vision) FPGA, first FPGA on APF* must be configured with this bitstream.

  • Configure the first fpga (if you transfer files by nfs):
 # modprobe fpgaloader

On APF27: 

 # load_fpga apf27_spvision_loader.bit

On APF51: 

 # load_fpga apf51_spvision_loader.bin
  • Once the first FPGA configured, just do :
 # modprobe sploader
 # modprobe sploader_prober
 # dd if=your_sp_vision_bitstream.bit of=/dev/sp_loader

Communicate with sp_vision

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