Difference between revisions of "Using FPGA"
From ArmadeusWiki
(→Developing on the APF FPGA) |
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=== FPGA Interfaces === | === FPGA Interfaces === | ||
| − | * APF9328 : [[IMX9328-Spartan3 interface description]] | + | * [[APF9328]] : [[IMX9328-Spartan3 interface description]] |
| − | * APF27 : [[IMX27-Spartan3A interface description]] | + | * [[APF27]] : [[IMX27-Spartan3A interface description]] |
| − | * APF51 : [[IMX51-Spartan6 interface description]] | + | * [[APF51]] : [[IMX51-Spartan6 interface description]] |
| − | * | + | * [[APF6_SP]]: |
** [[IMX6-CycloneV interface description | IMX6-CycloneV interface description (PCIe)]] | ** [[IMX6-CycloneV interface description | IMX6-CycloneV interface description (PCIe)]] | ||
** [[DDR3-CycloneV interface description | DDR3-CycloneV interface description]] | ** [[DDR3-CycloneV interface description | DDR3-CycloneV interface description]] | ||
Revision as of 14:12, 1 February 2016
Developing on the APF FPGA
FPGA Interfaces
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Using Armadeus FPGAManage the FPGA from Armadeus distribution.
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Make some examplesThese examples give the basis to make VHDL design for FPGA.
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Design ToolsDescription of tools used to simulate, to synthesize, and to download/configure FGPA. Xilinx
Altera
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Automatize FPGA design makingPeripherals On DemandFor complex projects, POD should be used to simplify design. MigenWith migen, it's possible to develop FPGA design in Python then generate Verilog for synthezis. ChiselWith Chisel, it's possible to develop FPGA design in Scala then generate C++ model for simulation and Verilog model for synthezis. |
VHDL
Verilog |
LinksSome useful links. Wishbone Spartan CycloneV |
