Difference between revisions of "Op6spJ2pinout"
From ArmadeusWiki
Line 1: | Line 1: | ||
− | Mapping in csv format of table given in datasheet (chapter 8.2). | + | Mapping in csv format of table given in [http://www.opossom.com/_downloads/opos6ul_sp/documentation/datasheet_opos6ul_sp.pdf datasheet (chapter 8.2)]. |
<pre> | <pre> |
Latest revision as of 11:08, 10 January 2020
Mapping in csv format of table given in datasheet (chapter 8.2).
22, IO_L37P_M3DQ0_3, FPGA_BANK3, VCC03, N2 23, IO_L37N_M3DQ1_3, FPGA_BANK3, VCC03, N1 24, IO_L40N_M3DQ7_3, FPGA_BANK3, VCC03, K1 26, IO_L2P_0, FPGA_BANK0, VCCO0, B3 27, IO_L2N_0, FPGA_BANK0, VCCO0, A3 28, IO_L4P_0, FPGA_BANK0, VCCO0, C4 29, IO_L4N_0, FPGA_BANK0, VCCO0, A4 30, IO_L6P_0, FPGA_BANK0, VCCO0, B5 31, IO_L6N_0, FPGA_BANK0, VCCO0, A5 32, IO_L33P_0, FPGA_BANK0, VCCO0, C6 33, IO_L33N_0, FPGA_BANK0, VCCO0, A6 34, IO_L35P_GCLK17_0, FPGA_BANK0, VCCO0, B7 35, IO_L35N_GLCK16_0, FPGA_BANK0, VCCO0, A7 36, IO_L37P_GLCK13_0, FPGA_BANK0, VCCO0, B9 37, IO_L37N_GLCK12_0, FPGA_BANK0, VCCO0, A9 38, IO_L63P_0, FPGA_BANK0, VCCO0, B11 39, IO_L63N_0, FPGA_BANK0, VCCO0, A11 40, IO_L65P_0, FPGA_BANK0, VCCO0, B13 41, IO_L65N_0, FPGA_BANK0, VCCO0, A13 43, IO_L1P_A25_1, FPGA_BANK1, VCCO1, B14 44, IO_L1N_A24_VREF_1, FPGA_BANK1, VCCO1, B15 45, IO_L33P_A15_M1A10_1, FPGA_BANK1, VCCO1, C14 46, IO_L33N_A14_M1A4_1, FPGA_BANK1, VCCO1, C15 47, IO_L37P_A7_M1A0_1, FPGA_BANK1, VCCO1, E14 48, IO_L37N_A6_M1A1_1, FPGA_BANK1, VCCO1, E15 49, IO_L39P_M1A3_1, FPGA_BANK1, VCCO1, F13 50, IO_L39N_M1ODT_1, FPGA_BANK1, VCCO1, F15 51, IO_L41P_GCLK9_IRDY1_M1RASN_1, FPGA_BANK1, VCCO1, G14 52, IO_L41N_GCLK8_M1CASN_1, FPGA_BANK1, VCCO1, G15 53, IO_L43P_GCLK5_M1DQ4_1, FPGA_BANK1, VCCO1, J14 54, IO_L43N_GCLK4_M1DQ5_1, FPGA_BANK1, VCCO1, J15 55, IO_L45P_A1_M1LDQS_1, FPGA_BANK1, VCCO1, L14 56, IO_L45N_A0_M1LDQSN_1, FPGA_BANK1, VCCO1, L15 64, IO_L47N_LDC_M1DQ1_1, FPGA_BANK1, VCCO1, N15 65, IO_L47P_FWE_B_M1DQ0_1, FPGA_BANK1, VCCO1, N14 66, IO_L46N_FOE_B_M1DQ3_1, FPGA_BANK1, VCCO1, M15 67, IO_L46P_FCS_B_M1DQS2_1, FPGA_BANK1, VCCO1, M13 68, IO_L44N_A2_M1DQ7_1, FPGA_BANK1, VCCO1, K15 69, IO_L44P_A3_M1DQ6_1, FPGA_BANK1, VCCO1, K13 70, IO_L42N_GCLK6_TRDY1_M1LD_M, FPGA_BANK1, VCCO1, H15 71, IO_L42P_GCLK7_M1UDM_1, FPGA_BANK1, VCCO1, H13 72, IO_L40N_GCLK10_M1A6_1, FPGA_BANK1, VCCO1, L12 73, IO_L40P_GCLK11_M1A5_1, FPGA_BANK1, VCCO1, K12 74, IO_L38N_A4_M1CLKN_1, FPGA_BANK1, VCCO1, K11 75, IO_L38P_A5_M1CLK_1, FPGA_BANK1, VCCO1, K10 78, IO_L40N_0, FPGA_BANK0, VCCO0, E9 79, IO_L40P_0, FPGA_BANK0, VCCO0, F10 80, IO_L38N_0, FPGA_BANK0, VCCO0, E8 81, IO_L38P_0, FPGA_BANK0, VCCO0, F8 82, IO_L36N_GLCK14_0, FPGA_BANK0, VCCO0, A8 83, IO_L36P_GLCK15_0, FPGA_BANK0, VCCO0, C8 84, IO_L34N_GLCK18_0, FPGA_BANK0, VCCO0, D8 85, IO_L34P_GCLK19_0, FPGA_BANK0, VCCO0, E7 86, IO_L7N_0, FPGA_BANK0, VCCO0, C7 87, IO_L7P_0, FPGA_BANK0, VCCO0, D7 88, IO_L5N_0, FPGA_BANK0, VCCO0, D6 89, IO_L5P_0, FPGA_BANK0, VCCO0, E6 90, IO_L3N_0, FPGA_BANK0, VCCO0, C5 91, IO_L3P_0, FPGA_BANK0, VCCO0, D5 95, IO_L40P_M3DQ6_3, FPGA_BANK3, VCC03, K3 96, IO_L39N_M3LDQSN_3, FPGA_BANK3, VCC03, L1 97, IO_L39P_M3LDQS_3, FPGA_BANK3, VCC03, L2 98, IO_L38N_M3DQ3_3, FPGA_BANK3, VCC03, M1 99, IO_L38P_M3DQ2_3, FPGA_BANK3, VCC03, M3