Difference between revisions of "Using FPGA"
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== Introduction == | == Introduction == | ||
[[FPGA | FPGA on APF introduction]] | [[FPGA | FPGA on APF introduction]] | ||
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==Developing on the APF FPGA== | ==Developing on the APF FPGA== | ||
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{| border="0" cellpadding="5" cellspacing="5" summary="Hardware Add-Ons by functionnalities" width="100%" | {| border="0" cellpadding="5" cellspacing="5" summary="Hardware Add-Ons by functionnalities" width="100%" | ||
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|- style="background:#f4f4f4; color:black; -moz-border-radius:18px;" | |- style="background:#f4f4f4; color:black; -moz-border-radius:18px;" | ||
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| width="50%" | | | width="50%" | | ||
===Tools=== | ===Tools=== | ||
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* [[FPGA_register | read write on fpga address domain from linux]] | * [[FPGA_register | read write on fpga address domain from linux]] | ||
* [[How to simulate post synthesis and post place & route design with GHDL]] | * [[How to simulate post synthesis and post place & route design with GHDL]] | ||
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===Xilinx documentation links=== | ===Xilinx documentation links=== | ||
* [http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf Spartan-3 FPGA Family Data Sheet] | * [http://www.xilinx.com/support/documentation/data_sheets/ds099.pdf Spartan-3 FPGA Family Data Sheet] | ||
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===Links VHDL=== | ===Links VHDL=== | ||
* [http://www.opencores.org www.opencores.org] | * [http://www.opencores.org www.opencores.org] | ||
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* [http://www.gmvhdl.com/VHDL.html An Introductory VHDL Tutorial] | * [http://www.gmvhdl.com/VHDL.html An Introductory VHDL Tutorial] | ||
* [http://www.xess.com/ho03000.html Nice ideas/examples to look at] | * [http://www.xess.com/ho03000.html Nice ideas/examples to look at] | ||
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|- style="background:#f4f4f4; color:black; -moz-border-radius:18px;" | |- style="background:#f4f4f4; color:black; -moz-border-radius:18px;" | ||
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===Orchestra=== | ===Orchestra=== | ||
* [[Orchestra | Spécification d'Orchestra (French)]] | * [[Orchestra | Spécification d'Orchestra (French)]] | ||
| + | ---- | ||
| + | ''Draft:'' | ||
| + | * [[Usecases | Diagrammes des cas d'utilisations du logiciel]] | ||
| + | * [[OrchestraPython | Elaboration du projet Orchestra en Python (French)]] | ||
| + | * [[FpgaArchitecture | Spécification de l'architecture du FPGA (french)]] | ||
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| + | ===Links Orchestra=== | ||
| + | * [http://www.opencores.org/projects.cgi/web/wishbone/wbspec_b3.pdf official Wishbone specifications] | ||
| + | * [http://en.wikipedia.org/wiki/Wishbone_%28computer_bus%29 Wikipedia Wishbone doc] | ||
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| + | |- style="background:#f4f4f4; color:black; -moz-border-radius:18px;" | ||
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| + | | width="50%" | | ||
| + | ===Orchestra=== | ||
| + | * [[Orchestra | Spécification d'Orchestra (French)]] | ||
---- | ---- | ||
''Draft:'' | ''Draft:'' | ||
Revision as of 15:32, 12 December 2008
Contents
Introduction
Developing on the APF FPGA
Tools |
Xilinx documentation links |
Designs |
Links VHDL |
OrchestraDraft: |
Links Orchestra |
OrchestraDraft: |
Links Orchestra |
