Difference between revisions of "User:JulienQ"
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(New page: Hi! My name is Julien. I recently graduated a master's degree in electronics engineering and embedded systems. During my studies I worked for 3 years in a research laboraory in France, wh...) |
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My name is Julien. I recently graduated a master's degree in electronics engineering and embedded systems. | My name is Julien. I recently graduated a master's degree in electronics engineering and embedded systems. | ||
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During my studies I worked for 3 years in a research laboraory in France, where I practised FPGA and board design. | During my studies I worked for 3 years in a research laboraory in France, where I practised FPGA and board design. | ||
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My main interest is in signal processing (particularly audio processing), targeting either FPGAs or CPUs/DSP, and I would like to develop some applications on my own or with other hobbyist. | My main interest is in signal processing (particularly audio processing), targeting either FPGAs or CPUs/DSP, and I would like to develop some applications on my own or with other hobbyist. | ||
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+ | == Skills: == | ||
+ | • VHDL | ||
+ | • Board design | ||
+ | • GNU/Linux | ||
+ | • Shell & Tcl scripting | ||
+ | • C/C++ |
Latest revision as of 17:00, 28 October 2013
Hi!
My name is Julien. I recently graduated a master's degree in electronics engineering and embedded systems.
During my studies I worked for 3 years in a research laboraory in France, where I practised FPGA and board design.
My main interest is in signal processing (particularly audio processing), targeting either FPGAs or CPUs/DSP, and I would like to develop some applications on my own or with other hobbyist.
Skills:
• VHDL • Board design • GNU/Linux • Shell & Tcl scripting • C/C++