Difference between revisions of "Migen"
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== Introduction == | == Introduction == | ||
| − | Migen is a python module that make FPGA design possible without VHDL or Verilog. Writing a Migen design for fpga is like writing python | + | Migen is a python module that make FPGA design possible without VHDL or Verilog. Writing a Migen design for fpga is like writing python program. If it's correctly configured with ISE or Quartus, Migen is capable of generating the bitstream directly. |
APF27 and APF51 platform has been integred under Migen module, then design can be done with it for these APF. | APF27 and APF51 platform has been integred under Migen module, then design can be done with it for these APF. | ||
Revision as of 13:58, 21 July 2014
Introduction
Migen is a python module that make FPGA design possible without VHDL or Verilog. Writing a Migen design for fpga is like writing python program. If it's correctly configured with ISE or Quartus, Migen is capable of generating the bitstream directly.
APF27 and APF51 platform has been integred under Migen module, then design can be done with it for these APF.
Blink led Example
APF27
#!/usr/local/bin/python3.4
# -*- coding: utf-8 -*-
from migen.fhdl.std import *
from mibuild.generic_platform import Pins, IOStandard
from mibuild.platforms import apf27
ios = [
("user_led", 0, Pins("J2:22"), IOStandard("LVCMOS33"))
]
plat = apf27.Platform()
plat.add_extension(ios)
led = plat.request("user_led", 0) # led pin on apf27dev
m = Module()
counter = Signal(26)
m.comb += led.eq(counter[25])
m.sync += counter.eq(counter + 1)
plat.build_cmdline(m)
APF51
#!/usr/local/bin/python3.4
# -*- coding: utf-8 -*-
from migen.fhdl.std import *
from mibuild.generic_platform import Pins, IOStandard
from mibuild.platforms import apf51
ios = [
("user_led", 0, Pins("J2:15"), IOStandard("LVCMOS33"))
]
plat = apf51.Platform()
plat.add_extension(ios)
led = plat.request("user_led", 0) # led pin on apf51dev
m = Module()
counter = Signal(26)
m.comb += led.eq(counter[25])
m.sync += counter.eq(counter + 1)
plat.build_cmdline(m)
