A simple design with Wishbone bus

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This article intended to explain how to design Wishbone compatible components with simple example. The VHDL code sources can be found in sourceforge tree.

Description of wishbone structure for ARMadeus can be found here in french.

General structure

The main functionality of this component is to do the same things that benoît project : switch on a led when a button is pressed.

But to learn about designing Wishbone component and linux driver, the design is little bit more complicated (!).

When button is pressed, the component button send interrupt signal to irq_mngr. irq_mngr will toggle a flag and send interruption to i.mx processor. A Linux driver on i.mx will read irq_mngr and acknowledge irq by writing '1' on a register. And finally, Linux driver will toggle led value by writing on led register.

figure 1 - Schematics of wishbone example

imx_wrapper, syscon and irq_mngr are standards ARMadeus-Wishbone IPs that just been instantiated in our design.

button and led are simple slave component we want to integrate in the FPGA.

All these components are connected together with the 'glue logic' component intercon.

Wrapper

The wrapper is used to convert i.MX interface signals into Wishbone signals. Table above show signals from i.MX and signals to wishbone conversion :

i.MX signals	function	Wishbone signals
imx_address(12)	Address vector	wbm_address(13)
imx_data(16)	Data vector	wbm_writedata(16) and wbm_readdata(16)
imx_cs_n	Chip select	wbm_strobe and wbm_cycle
imx_oe_n	Read signal	/wbm_write
imx_eb3_n	Write signal	wbm_write
-	Acknowledge	wbm_ack

Intercon

The intercon is a component used to manage signal between wishbone master and slaves component. This component decode Wishbone-master addresses and dispatch its to Wishbone-slave components.

figure 2 - Intercon internal structure

Wishbone slave application components

In this example their are 3 wishbone-slave components :

irq manager

Some component (here, just button) generate interrupts, irq manager is used to group these interrupts for i.MX.

wb_led

This component is a simple 16-bit Wishbone slave output port, from wishbone specification example (p110).

figure 3 - Led internal structure

It is a simple register, that can be read and write. The led is controlled with register pin 0.

wb_button

Wb_button component, is like led but in read only and with an edge detector to rise irq.

figure 4 - Button internal structure

Components drivers

Each component is drove with a Linux driver described above. All driver code is in armadeus directory in target/linux/module/fpga/wishbone_example/.

irq manager

IRQ management relative to the FPGA description is available POD_Interrupt_handler here. The module code source can be found here.

led

Led driver is seen in linux like a character driver. Writing in dev file will enable or disable LED.

The driver is composed of two modules :

• g_led : this module implement generic led driver mechanisms.
• board_led :

button

Button driver is seen in Linux like a character driver. When a process want to read value in button register, the driver will block reading until an interrupt occur.