POD roadmap

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Revision as of 18:11, 18 January 2013 by FabienM (Talk | contribs)

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This is the roadmap of POD :

  • POD 1.0 :
    • VHDL Intercon generation
    • VHDL top generation
    • ARMadeus 4.0 templates available for multiple instances of a component
  • POD 1.1 :
    • platform and library out of POD repository (?)
    • Manage FPGA IOs settings with FPGA configuration files for each type of FPGA.
    • Library documentation generator.
  • POD 2.0 :
    • Adding Verilog HDL language
    • Generate SystemC testbench
    • Manage Verilog to SystemC conversion (with verilator) for testbench