SP VISION

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Revision as of 15:14, 7 January 2011 by FabienM (Talk | contribs) (New page: == Introduction == The board sp_vision is an extension of apf27-Dev and apf51-dev with a spartan6 and two ddr. It is design for video processing. == Configure the Spartan6 with apf27-Dev...)

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Introduction

The board sp_vision is an extension of apf27-Dev and apf51-dev with a spartan6 and two ddr. It is design for video processing.

Configure the Spartan6 with apf27-Dev

Spartan6 selectmap configuration port is plugged on generic IO of apf27 spartan3 fpga. Then, to configure spartan6, a specific virtual component is required under spartan3. This virtual component is available under POD components library and is named spartan_selectmap. This component must be added to your spartan3 design to enable sp_vision spartan6 configuration.

A simple spartan3 design is available under ARMadeus project tree firmware/sp_vision_config/ to simplify sp_vision config. The design can be synthetized with ISE using the TCL script firmware/sp_vision_config/synthesis/testconfig.tcl. The already synthetized bitstream is also available under firmware/sp_vision_config/bitstream/.

Then to configure spartan6 :

  • first configure apf27-spartan3:
BIOS> tftpboot ${loadaddr} top_testconfig.bit
BIOS> fpga load 0 ${loadaddr} 2486f
  • then configure the second fpga using loadsecond operator:
BIOS> tftpboot ${loadaddr} spartan6_example_top.bit
BIOS> fpga loadsecond 1 ${loadaddr} 16a674 D6000000 1
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